For my game engine, I am working on a mechanism that reads a byte array and then dynamically generates machine code instructions with a chain of "lda #imm, sta PPU_DATA" in a RAM buffer, which can be easily modified with simple predictable writes in the spaces for setting loading vram address values as well as character data. Alternatively it can determine the two most commonly used values in the array (0 seems to be the most common) and shave cycles off with an stx or sty, creating (mostly) non modifiable code that is tighter on execution.
This allows for some really tight VRAM transfers during vblank.
Based on tests so far, I believe that I could squeeze OAM DMA, 8 way scrolling (up to 7 pixels/frame), palette updates, have enough bandwidth to modify 8 to 12 chr blocks per vblank period.
The issue I am running into is these cached instructions take up a lot of space, with a maxed out instruction buffer looking at being somewhere around 2k in size, and I could max out the extra 8k of ram easily if I had multiple sets of cached instructions. Do any mappers support banking the work ram like they do the video ram?
This allows for some really tight VRAM transfers during vblank.
Based on tests so far, I believe that I could squeeze OAM DMA, 8 way scrolling (up to 7 pixels/frame), palette updates, have enough bandwidth to modify 8 to 12 chr blocks per vblank period.
The issue I am running into is these cached instructions take up a lot of space, with a maxed out instruction buffer looking at being somewhere around 2k in size, and I could max out the extra 8k of ram easily if I had multiple sets of cached instructions. Do any mappers support banking the work ram like they do the video ram?
Statistics: Posted by spaceharrier — Thu Nov 07, 2024 8:22 am — Replies 4 — Views 194