When you run your OAM DMA, the address ($2004) that it writes to is hard wired into the transistors of the DMA unit. What if you had a mapper that connected the CPU A0 and A1 lines when that address is being written to +5V through a specifically chosen impedance? That way, you would induce a bus conflict and possibly?? pull the address lines high enough for the PPU to read them as high, so it would instead perform a write to $2007. In theory you could use this to upload graphics or something. Of course this would also cook the CPU's bus drivers or whatever has to sink all of that current going from the address line "high" level down to 0V. The question is whether it would be possible to pick an impedance in your mapper that would be low enough to overpower the CPU in the bus conflict, but high enough that the CPU wouldn't be incinerated (although maybe it would be partially damaged?)
It seems unlikely but I'm not certain. I would love to find some more info so I can do the math for this, does anyone know where I could find the electrical characteristics on the 2A03's address lines and the lowest voltage that the PPU considers "high"?
Please forgive any grievous misunderstandings, I am but a lowly first-year electrical engineering student...
It seems unlikely but I'm not certain. I would love to find some more info so I can do the math for this, does anyone know where I could find the electrical characteristics on the 2A03's address lines and the lowest voltage that the PPU considers "high"?
Please forgive any grievous misunderstandings, I am but a lowly first-year electrical engineering student...
Statistics: Posted by joshop — Tue Nov 19, 2024 8:19 am — Replies 6 — Views 199