I'm experimenting with IRQ generation atm, and i'm trying to figure out how to format the IRQ signal.
So far, i have a counter, that gets incremented every M2 pulse, and it is compared to a register.
When the two registers are equal, the "IRQ_trigger" line is set high. This line is NANDed with the IRQ enable flag and M2 divided by 4. The output of the NAND gate is sent to the IRQ pin.
I'm not sure if this would work, because the IRQ line would be low for 4 cycles, and then high for 4 cycles.
Maybe i could reset the irq enable flag when one is triggered? I don't really know what to do here.
So far, i have a counter, that gets incremented every M2 pulse, and it is compared to a register.
When the two registers are equal, the "IRQ_trigger" line is set high. This line is NANDed with the IRQ enable flag and M2 divided by 4. The output of the NAND gate is sent to the IRQ pin.
I'm not sure if this would work, because the IRQ line would be low for 4 cycles, and then high for 4 cycles.
Maybe i could reset the irq enable flag when one is triggered? I don't really know what to do here.
Statistics: Posted by PizzerLover123 — Thu Nov 14, 2024 1:40 pm — Replies 2 — Views 99
